RC Circuit Calculator Guide | τ, 3τ and Cutoff

First-order RC (resistor–capacitor) circuits are the simplest networks that exhibit time-dependent behaviour. They appear in timing networks, filters, snubbers, sensor signal-conditioning, and many control circuits. For a common example, 10 kΩ with 10 µF gives τ = 0.1 s, so the capacitor reaches roughly 95% of its final voltage in 3τ = 0.3 s.

This guide focuses on practical engineering use of first-order RC circuits:

• How to interpret the time constant τ = R×C
• How to use charging and discharging formulas to predict capacitor voltage vs. time
• How τ relates to cutoff frequency for simple low-pass and high-pass filters
• How to follow a design workflow with realistic component values and constraints

For a refresher on basic voltage–current–resistance relationships, see the Ohm's Law Fundamentals guide. For more general series/parallel behaviour, see Series and Parallel Circuits. When you need a compact reference while choosing standard values, keep the RC Time Constant Chart open beside the calculator.

1. What is a first-order RC circuit?

A first-order RC circuit contains exactly one energy-storage element (a capacitor C) and at least one resistor R such that:

• The circuit's behaviour can be described by a first-order differential equation
• Transient responses (charging or discharging) follow a single time constant τ

Two canonical forms are:

• Series RC (driven by a voltage source through a resistor)
• Parallel RC (driven by a current source or with load resistance in parallel)

In most low-voltage electronics and control work, you can treat R and C as lumped, linear components within their ratings.

1.1 Time constant τ = R×C

The time constant τ (Greek letter tau) is the characteristic time scale of the circuit:

• Units: seconds (s)
• Formula: τ = R × C
• R in ohms (Ω)
• C in farads (F)

Rule of thumb checkpoints for a step change (ideal RC, no load):

• At t = 1τ → capacitor has moved ~63.2% toward its final value
• At t = 3τ → ~95% toward final value
• At t = 5τ → >99% toward final value (often treated as "settled")

These checkpoints are central to timing design and interpreting calculator results.

2. Time-domain behaviour: charging and discharging

Consider a simple series RC circuit where a DC voltage source V_step is applied at t = 0 across R and C in series.

2.1 Capacitor charging curve

When you apply a step from 0 to V_step, the capacitor voltage grows according to:

• Charging equation

V_c(t) = V_step × (1 − e^(−t / τ))

Key points:

• At t = 0 → V_c(0) = 0
• As t → ∞ → V_c(t) → V_step
• The slope is steep at first and then flattens as it approaches V_step

Typical design checkpoints:

• t = 1τ → V_c ≈ 0.632 × V_step
• t = 3τ → V_c ≈ 0.95 × V_step
• t = 5τ → V_c ≈ 0.993 × V_step

These are the values you will see reported or implied in the RC Circuit Calculator.

Example 1 – 10 kΩ / 10 µF timing network

Suppose you have:

• R = 10 kΩ
• C = 10 µF
• V_step = 5 V

1. Compute τ

• C in farads: 10 µF = 10 × 10⁻⁶ F = 10e-6 F
• τ = R × C = 10,000 Ω × 10e-6 F = 0.1 s (100 ms)

2. Use τ checkpoints

• At t = 1τ = 0.1 s → V_c ≈ 0.632 × 5 V ≈ 3.16 V
• At t = 3τ = 0.3 s → V_c ≈ 0.95 × 5 V ≈ 4.75 V
• At t = 5τ = 0.5 s → V_c ≈ 0.993 × 5 V ≈ 4.97 V

In practice, you might say: "This network reaches about 5 V within half a second."

2.2 Capacitor discharging curve

If the capacitor is charged to V_0 and then allowed to discharge through R, the voltage decays as:

• Discharging equation

V_c(t) = V_0 × e^(−t / τ)

Key points:

• At t = 0 → V_c(0) = V_0
• As t → ∞ → V_c(t) → 0

Checkpoint values (approximate):

• t = 1τ → V_c ≈ 0.37 × V_0
• t = 3τ → V_c ≈ 0.05 × V_0
• t = 5τ → V_c ≈ 0.007 × V_0

Example 2 – Bleed-down time after power is removed

A 47 µF capacitor is charged to 24 V and discharges through a 22 kΩ resistor.

1. Compute τ

• C = 47 µF = 47e-6 F
• R = 22 kΩ = 22,000 Ω
• τ = 22,000 × 47e-6 ≈ 1.034 s

2. Estimate time to below 1 V

We want V_c(t) ≤ 1 V. Use the discharging equation in logarithmic form:

• V_c(t) = V_0 × e^(−t / τ)
• t = −τ × ln(V_c / V_0)

Here, V_0 = 24 V, V_c = 1 V:

• t = −1.034 × ln(1 / 24) ≈ 1.034 × ln(24) ≈ 1.034 × 3.18 ≈ 3.29 s

So it takes roughly 3.3 s for the capacitor to fall from 24 V to ~1 V in this configuration.

For snubbers and safety-related discharge, designers often target multiple τ to ensure voltages are within acceptable limits before servicing.

1.2 RC Time Constant Quick Reference Table

τ = R × C (in seconds). Find R in rows, C in columns:

R \ C	1 nF	10 nF	100 nF	1 µF	10 µF	100 µF
100 Ω	100 ns	1 µs	10 µs	100 µs	1 ms	10 ms
1 kΩ	1 µs	10 µs	100 µs	1 ms	10 ms	100 ms
10 kΩ	10 µs	100 µs	1 ms	10 ms	100 ms	1 s
100 kΩ	100 µs	1 ms	10 ms	100 ms	1 s	10 s
1 MΩ	1 ms	10 ms	100 ms	1 s	10 s	100 s

Settled time (>99%): 5τ. Example: 10 kΩ + 10 µF → τ = 100 ms; settled after 500 ms. For 3τ (95%) timing networks, use 3 × the table value.

3. Frequency-domain view: RC filters and cutoff frequency

The same RC parameters that control time-domain behaviour also determine the frequency response of simple filters.

3.1 Cutoff frequency fc

For a first-order RC low-pass or high-pass filter, the cutoff frequency is:

• f_c = 1 / (2π R C)

Cutoff Frequency Quick Reference Table — f_c = 1/(2πRC) in Hz:

R \ C	1 nF	10 nF	100 nF	1 µF	10 µF	100 µF
100 Ω	1.59 MHz	159 kHz	15.9 kHz	1.59 kHz	159 Hz	15.9 Hz
1 kΩ	159 kHz	15.9 kHz	1.59 kHz	159 Hz	15.9 Hz	1.59 Hz
10 kΩ	15.9 kHz	1.59 kHz	159 Hz	15.9 Hz	1.59 Hz	0.16 Hz
100 kΩ	1.59 kHz	159 Hz	15.9 Hz	1.59 Hz	0.16 Hz	0.016 Hz
1 MΩ	159 Hz	15.9 Hz	1.59 Hz	0.16 Hz	0.016 Hz	1.6 mHz

All values derived from fc = 1/(2πRC) = 1/(2πτ). At f_c: output = −3 dB (0.707× input), phase shift = −45°. Verification: 100Ω × 1nF → τ = 100ns → f_c = 1/(2π×100ns) = 1.592 MHz ✔. To find any entry: f_c (Hz) = 10⁶ / (2π × R_kΩ × CµF) = 159,155 / (RkΩ × CµF).

At f = f_c:

• The magnitude of the gain is −3 dB relative to the passband
• Output voltage is ~0.707 × input (for an ideal filter)

3.2 RC low-pass filter

A simple voltage-divider low-pass filter can be built with R in series and C to ground at the output node.

Key characteristics:

• Low frequencies → Capacitor behaves like an open circuit, output ≈ input
• High frequencies → Capacitor behaves like a short, output is attenuated
• Roll-off slope → ~−20 dB/decade (−6 dB/octave) beyond f_c

Example 3 – Low-pass filter for sensor anti-aliasing

You have an ADC sampling at 4 kS/s and want a simple anti-aliasing filter with f_c ≈ 400 Hz.

1. Choose a convenient C (e.g., 100 nF = 0.1 µF)

2. Solve for R from f_c = 1/(2πRC)

• R = 1 / (2π f_c C)
• R ≈ 1 / (2π × 400 × 0.1e-6)
• R ≈ 1 / (2π × 4e-5) ≈ 1 / (2.513e-4) ≈ 3.98 kΩ

3. Select a standard resistor value, e.g., 3.9 kΩ or 4.02 kΩ.

You can then verify the exact f_c using the RC Circuit Calculator in frequency-response mode.

3.3 RC high-pass filter

A simple high-pass network is formed by placing C in series with the input and R to ground.

Key characteristics:

• High frequencies → Capacitor passes AC, output tracks input (minus any loading)
• Low frequencies / DC → Capacitor blocks, output tends toward zero
• Same f_c = 1 / (2πRC) relationship

Applications include coupling capacitors between amplifier stages or sensor biasing networks.

4. Design workflow with calculators

This section outlines a practical workflow that leverages EleCalculator tools:

1. Define the use case

• Timing (delay before a relay picks up, LED fade, etc.)
• Filter (noise reduction, anti-aliasing, coupling)
• Snubber or surge-limiting (first-order approximation only)

2. Select target τ or f_c

• For timing: choose τ such that 3τ or 5τ matches your timing requirement
• For filters: choose f_c based on bandwidth, sampling rate, or interference frequency

3. Pick an initial C value

• Check what values are common and readily available
• Account for voltage rating, tolerance, and temperature behavior

4. Solve for R

• For timing: τ = R × C → R = τ / C
• For filters: f_c = 1 / (2πRC) → R = 1 / (2π f_c C)

5. Check against practical limits

• R too large → noisy, sensitive to leakage, slower startup
• R too small → high load on source, more power dissipation

6. Use calculators for verification

• RC Circuit Calculator for τ, V_c(t), and f_c
• Impedance Calculator for detailed Z and phase
• Capacitor Calculator and Capacitor Code Calculator for realistic parts

7. Iterate with non-idealities

• Consider ESR, tolerance, temperature coefficients, and layout
• For high-energy or high-voltage applications, supplement with manufacturer application notes and safety standards

5. Worked design examples

5.1 Timing network for a 0.5 s delay

Goal: A logic input should reach its threshold (~63% of final voltage) about 0.5 s after power is applied.

1. Choose τ based on threshold

• Many logic inputs trigger around ~0.5–0.7 × V_supply
• At t = 1τ, V_c ≈ 0.632 × V_step → good first approximation
• So target τ ≈ 0.5 s

2. Select C

• Choose C = 10 µF (common electrolytic value)

3. Solve for R

• τ = R × C → R = τ / C = 0.5 / (10e-6) = 50,000 Ω = 50 kΩ

4. Check practicality

• 50 kΩ is reasonable for a logic input with high impedance
• Power dissipated is small: P = V² / R for steady-state leakage is usually negligible

5. Verify with the RC calculator

• Enter R = 50 kΩ, C = 10 µF, V_step = supply voltage
• Confirm V_c(0.5 s) is near the required threshold

If the threshold is significantly above or below 63%, adjust τ or include a buffer/comparator stage.

5.2 Low-pass filter for power-supply ripple

Goal: Reduce 100 Hz ripple from a small DC supply before it feeds an ADC input.

1. Set target cutoff

• Place f_c well below 100 Hz, for example 10 Hz, to strongly attenuate ripple

2. Pick C

• Choose a relatively large capacitor, e.g., C = 47 µF (electrolytic)

3. Solve for R

• R = 1 / (2π f_c C)
• ≈ 1 / (2π × 10 × 47e-6) ≈ 1 / (2π × 4.7e-4) ≈ 1 / (2.953e-3) ≈ 339 Ω

4. Evaluate trade-offs

• R ≈ 330–340 Ω will introduce some series resistance between source and load
• Ensure this does not cause excessive voltage drop at load current

5. Check with RC calculator

• Use frequency-response mode to check attenuation at 100 Hz and the passband level at DC

5.3 RC Snubber and Debounce Circuits

RC Snubber for Relay and Switch Arc Suppression

When a relay contact or mechanical switch opens, the inductance of coils and wiring creates a voltage spike that can damage semiconductor devices and create electromagnetic interference. A simple RC snubber placed across the contact suppresses this spike.

Standard snubber sizing rule for relay contacts (DC circuits):

• R_s = V_supply / I_peak_contact (typical result: 10–100 Ω)
• C_s = I_contact × L / V_supply² (typical result: 10 nF–1 µF)

For AC relay contacts and small signal relays, a practical starting point is:

Contact Current	Typical R_s	Typical C_s	RC τ	Notes
<1 A (signal relay)	100 Ω	10 nF	1 µs	Placed directly across contact
1–10 A (power relay)	47 Ω	47 nF	2.2 µs	Across contact or across coil
10–100 A (contactor)	10 Ω	100 nF	1 µs	Manufacturer data preferred
AC mains contact	100 Ω + varistor	10–100 nF	—	Use listed or manufacturer-rated components only

Important: Capacitors across AC mains contacts must be rated for across-line AC service, such as suitable safety-class capacitors selected from the manufacturer's datasheet. Resistors must handle peak surge power. For mains-connected circuits, use application-specific snubber modules rated for the circuit voltage and installation conditions, and cross-reference switch or relay manufacturer data.

RC Debounce Circuit for Mechanical Switches

Mechanical switch contacts bounce for 1–10 ms when making or breaking. An RC debounce circuit followed by a Schmitt-trigger input eliminates spurious transitions.

Design rule: τ = R × C should be 3–10× the expected bounce time of the switch.

Switch Type	Typical Bounce Time	Target τ	R (with Schmitt)	C
Tactile push button	1–5 ms	10–50 ms	10 kΩ	1–4.7 µF
Toggle/slide switch	5–10 ms	30–100 ms	10 kΩ	3.3–10 µF
Membrane keypad	1–3 ms	5–15 ms	10 kΩ	0.47–1.5 µF
Reed relay switch	0.1–1 ms	1–5 ms	10 kΩ	100–470 nF

Worked example — PCB tactile button, 3.3V Schmitt trigger input:

1. Target bounce time ≤ 5 ms; set τ = 20 ms (4× margin)
2. Choose C = 1 µF (standard value)
3. Solve: R = τ/C = 0.020 / (1×10⁻⁶) = 20,000 Ω → use 22 kΩ (E24)
4. Actual τ = 22 kΩ × 1 µF = 22 ms ✔
5. Schmitt trigger threshold (~0.9V on 3.3V rail) is crossed at t = −τ × ln(1 − 0.9/3.3) = 22 ms × 0.314 = 6.9 ms after button press — well clear of bounce window.

Note: An RC debounce alone (without Schmitt trigger) introduces a gradual voltage ramp that may trigger glitches on CMOS inputs without hysteresis. Always follow the RC with a Schmitt-trigger buffer (e.g., 74HC14) or use an MCU with hardware debounce timer.

6. Limitations, non-idealities, and safety

The formulas and examples above assume ideal, first-order behaviour:

• Ideal resistor (no inductance, no temperature coefficient)
• Ideal capacitor (no ESR, ESL, or voltage-dependent capacitance)
• No additional loading other than the modeled R and C

In real designs, consider:

• Load resistance in parallel with or in series with the RC network
• Capacitor tolerances (±10%, ±20% are common)
• Voltage ratings and surge capability
• Temperature range and aging, especially for electrolytics

For mains-level circuits, motor starters, or high-energy snubbers:

• Treat RC calculations as a first-pass numerical tool only
• Always cross-check with equipment datasheets, manufacturer application notes, and applicable standards (e.g., NFPA 70/NEC or relevant manufacturer documents)
• Ensure creepage/clearance, insulation class, and fault conditions are properly addressed

7. Summary and next steps

Key takeaways:

1. Time constant τ = R×C defines how fast a first-order RC responds
2. Charging and discharging curves follow exponential behaviour with useful checkpoints at 1τ, 3τ, and 5τ
3. The same R and C determine cutoff frequency f_c = 1/(2πRC) for simple low-pass and high-pass filters
4. A structured design workflow—choose τ or f_c, pick C, solve for R, then verify with tools—helps avoid guesswork
5. Real designs must consider non-idealities, loading, and safety standards

To continue building your circuit-analysis skill set:

• Use the RC Circuit Calculator to explore different R and C values
• Keep the RC Time Constant Chart nearby for tau and cutoff-frequency reference values
• Review Series and Parallel Circuits for more complex networks
• Use the Capacitor Code Calculator when the design moves from ideal C values to real component markings
• Study Kirchhoff's Laws and Thevenin and Norton Theorems for advanced equivalent-circuit methods